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[RFP] 2025 R&D Program on van der Waals (vdW) Materials and Process Technologies for Ultra-High-Density Semiconductors

Writer Research Support Team Date Created 2025.04.15 Hits65
붙임 1. 과제제안요구서(rfp).pdfFile preview

2025 R&D Program on van der Waals (vdW) Materials and Process Technologies for Ultra-High-Density Semiconductors

 
This program aims to secure next-generation 3D semiconductor leadership by developing source technologies for ultra-thin vdW materials and their application in 3D DRAM devices.
 

 

[ Program Overview ]

  • Program Title: R&D Program on vdW Materials and Process Technologies for Ultra-High-Density Semiconductors

  • Objective: To develop breakthrough 3D DRAM technologies utilizing vdW materials for future ultra-high-density semiconductors

  • Total Budget: KRW 38.46 billion over 6 years (KRW 4 billion in 2025)

  • Project Duration: 2025–2030

 
[ Focus Areas ]
 
Field Description
Core vdW Materials for Semiconductors Development of synthesis, doping, interface control, and analysis technologies for large-area vdW materials at semiconductor grade
vdW-based Device & Process Technologies Development of ultra-fine and 3D stacking processes using vdW materials
Project Management Office Oversees the overall coordination and integration of the consortium’s 10 sub-projects
 
[ Main RFP Details ]

  • RFP ID: 2025-Semiconductor·Display-Designated-14

  • Topic: Development of foundational technologies for vdW-based ultra-dense, large-area 3D DRAM

  • Total Budget: KRW 32.7 billion

  • Project Type: Consortium (10 sub-projects)

  • Number of Selected Consortiums: 1

  • Security Level: General

  • R&D Type: R1-1 (Development-focused)

 

[ Project Structure & Roles ]

A single consortium will be selected and must consist of 10 integrated sub-projects:

  1. Semiconductor-grade 12-inch vdW material synthesis/analysis

  2. High-speed, uniform synthesis for 12-inch vdW materials

  3. High-k dielectric materials for next-gen capacitors

  4. Precision dry doping of semiconductor-grade vdW materials

  5. Damage-free large-area vdW transfer

  6. Ultra-fine cell transistor development using vdW materials

  7. Precision control of heterojunction interfaces

  8. 3D-stacked vdW logic device development

  9. 3D memory cell implementation and verification

  10. Project Management (Lead Organization) – responsible for coordination and oversight

 

[ Application Schedule ]

Step Period
PI Online Submission April 25 (Fri) – May 9 (Fri), 2025, by 14:00 (KST)
Lead Institution Approval Deadline April 25 (Fri) – May 9 (Fri), 2025, by 18:00 (KST)

* For further details, please refer to the attached documents or the official announcement.
  If you need support in building a consortium, we can help explore potential networking opportunities through organizations such as Incheon Technopark.  

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